Harhan has developed a family of processor-level debug monitors and bootloaders called StarMON. We currently have support for the following major processor families:
Our processor monitors work on the principle of giving hardware and system software engineers as much direct unobstructed register and memory peek and poke access as possible. Each monitor initializes itself using the absolute minimum of system resources (i.e., depending on as little as possible to be working) and provides an interactive prompt on the serial console port. In particular our PowerPC debug monitors don't depend on working main memory: the monitor itself executes out of the boot flash chip and uses some small on-chip SRAM found in most SoCs nowadays (or the CPU core's built-in L1 cache with locked lines if nothing else is available) for its data variables and stack. The initialization, configuration and debug of the main memory subsystem is then under the user's full control with a working interactive console prompt!
Once the processor monitor is running, full register and memory peek and poke capabilities are available. These facilities are designed with real hardware and system software engineering needs in mind, not some abstract ideas taught in a computer science class:
If the processor in question has cache control attributes, they are under the user's control, not picked arbitrarily by the monitor's author.
If the processor in question doesn't support addressing memory directly by the physical address but requires that a memory map be set up (e.g., IBM PPC44x/46x cores), that memory map is under the user's control, not picked arbitrarily by the author and compiled into the monitor.
Writing to a register or a memory location doesn't require reading it
first.
Consider the case of a read-only register and a write-only register sharing
the same address, the read-only register being a FIFO with destructive reads.
Contrast with other popular monitors that try to be user-friendly
by
displaying the old content of a memory location before prompting for the new
value to be written.
But that's not all: our StarMON family of processor monitors are not just low-level debug tools to be set aside once the board has been proven to work, they can also function as bootloaders in the final product. Each of our StarMON family monitors has booted Linux or other OS/application code, and a product can be built with StarMON configured such that the OS or application boots automatically, but one can also interrupt the boot process and access the full capabilities of the low-level debug monitor.
StarMON is a custom product in that a custom version of it is created for
every customer, project or application as necessary.
There is no such thing as the master
source code for StarMON.
Harhan offers consulting services whereby
we can create a totally custom processor monitor / bootloader for your
board/chip/application using bits and pieces of our StarMON code and then
support and maintain it as necessary.
As far as already existing versions of StarMON are concerned, those which we have written for our own internal use (i.e., not for a client under an NDA) can found on our free computing FTP site:
/pub/PowerPC/StarMON.
/pub/net/PHY/SDSL.